New vocoder CMX638 and application design

l Introduction

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The rapid development of speech codec technology has enabled low- and medium-rate speech coding technology to be widely used in modern mobile communications. The initial pulse code modulation PCM scheme has a transmission rate of 64 Kb/s, which occupies a frequency bandwidth and is costly. In actual communication, some channels are difficult to expand and of poor quality, while some channels are widely used and difficult to update in the short term; for some expensive channels, compressing each bit means saving costs. How to transmit more voice data in a narrower bandwidth requires the use of various compression coding techniques to expand the communication capacity. Therefore, an application design scheme based on the new speech encoder CMX638 is given here.

2 Introduction to CMX638

The CMX638 is a highly integrated, high-performance full-duplex speech codec that uses robust advanced low-complexity waveform insertion technology to provide long-distance sound quality at ultra-low bit rates with FEC (Forward Error Correction). SDD (soft decision decoding), DTX (discontinuous transmission detection), VAD (voice activation detection), CNG (comfort noise generation), STD and DTMF signal detection functions. Therefore, the speech codec can be widely used in the fields of voice storage and playback, VoIP, digital PMR/LMR, and regenerative digital voice relay.

2.1 Main features

The CMX638 has the following key features: long-distance sound quality, robust advanced low-complexity waveform insertion coding algorithm: 2 050 b/s for various compression rate modes, 2 400 b/s, 2 750 b/s or 3 600 b /s (with FEC function); integrated 16-bit A/D and D/A converter, analog gain amplifier and digital low-pass filter: packet compression time length 20 ms, 40 ms, 60 ms and 80 ms; VAD, CNG, STD, and DTMF functions; +1.8 V and +3.3 V dual supplies: 48-pin LQFP (L4) and 48-pin VQFN (Q3) packages; operating temperature range -40°C to +85°C.

2.2 Internal structure

The internal structure of the CMX638 consists of two parts, analog and digital, as shown in Figure 1. When the port CSEL input is low, the external voice decoder (CODEC) is selected to exchange data with the external device through the serial interface SSP. The encoder and decoder select the data channel of the off-chip CODEC, and the port EEC and REC outputs are respectively Enable and reset the off-chip CODEC; when the CSEL input is high, the CMX638 selects the internal CODEC module, which includes the programmable gain amplifier (PGA) for the input/output channels, 16-bit PCM A/D and D/A converters. And a low-pass filter with a pass frequency of 4 kHz, which can effectively convert analog signals into digital signals and digital signals into analog signals. The host configures internal registers through the control bus C-BUS interface to implement different functions; the port SYNC synchronizes the host with the CMX 638; the speech compression encoder compresses the source signal into a low bit rate data frame, and the decoder decompresses the data frame to restore the source. Signal; if the FEC function is used, the switch selects the forward error correction encoder and decoder, both of which are added to the compression and decompression process of the data: the STD/DTMF management module provides special processing functions for the voice signal to achieve single or dual Tone detection improves voice compression and decompression quality.

Internal structure of the CMX638

2.3 Compared with AMBE2000

Compared with competing products voice compression codec AMBE2000, CMX638 has the following features: RALCWI algorithm, fast speed, good quality and simple structure; on-chip integrated gain amplifier, A/D and D/A converter, low-pass filter It can directly process analog signals and improve signal-to-noise ratio. It can be flexibly selected with external voice CODEC. Although there are many options for AMBE2000, the compression time length and FEC function can be applied to DMR TDMA and DMR FDMA. Other occasions; the number of package pins is small, easy to use and route, and low cost. Table 1 lists the similarities and differences between CMX638 and AMBE2000.

Similarities and differences between CMX638 and AMBE2000

3 How does CMX638 work?

3.1 Codec process

3.1.1 Simple frame format codec without FEC

The CMX638 provides a simple codec data frame format with compression rates of 2 050 b/s, 2 400 b/s, and 2 750 b/s. This process does not include FEC, STD and DTMF functions. The CMX638 collects 160 16-bit data every 20 ms (the sampling rate of the A/D converter is 8 kHz). When the first 20 ms is over, the encoding operation starts. Because the signals are similar and different, different jitter delays are generated. The first frame of data is read at 40 ms. It will be operated every 20 ms in the future to form a pipeline operation. In the decoding process, after the host inputs a frame of data to the CMX638 at 0 ms, the CMX 638 starts the decoding operation. Similar to the encoding, the algorithm jitter delay occurs. The output time of the first sample is determined by the internal register IDD. It should be ensured that continuous and valid data is output. Figure 2 shows the CMX638 simple frame format encoding and decoding process.

CMX638 simple frame format encoding and decoding process
3.1.2 Complex Frame Format Codec with FEC

The CMX638 provides a codec data frame format with forward error correction with a packet length of 60 ms, including 3 frames of data, with a compression rate of 3 600 b/s. The CMX638 starts sampling at time 0 and performs encoding operations every 20 ms. A jitter delay occurs. FEC encoding is inserted every 60 ms (black part of Figure 3). A packet is stable and valid at 80 ms, and the host reads the data. It will be operated every 60 ms later. During the decoding process, after the host inputs a data packet to the CMX638, it starts decoding each frame of data, and a jitter delay occurs. The appropriate internal register IDD is set to output continuous valid data after the delay. Figure 3 is a recurring frame format codec process with FEC with a packet compression time of 60 ms.

Recurring frame format codec process with FEC
3.2 Data frame format

The format of the data frame outputted by the CMX638 is relatively simple, and there is no frame header and other control flag information, and the valid data is directly output. When the compression rate is 2 050b/s, one frame of data is generated every 20 ms. The valid data bit is 41 bits, occupying 6 bytes. The host must exchange data with CMX638 in bytes, so it should input/output 6 words. Section, where the highest byte is FIFO, and 7 invalid bits do not affect the codec. When the compression rate is 2 400 b/s, the working principle is the same as the compression rate of 2 050 b/s. The valid data is 48 bits, which occupies 6 bytes and has no invalid bits. When the compression rate is 2 750 b/s, the valid data is 55 bits, occupying 7 bytes, 1 invalid bit, and 7 bytes must be input/output. When the compression rate is 3 600 b/s, with the FEC function, a packet including 3 frames is generated every 60 ms, the effective data is 216 bits, and the hard bit format is used, occupying 27 bytes. When using the soft bit format, it takes up 108 bytes.

3.3 Host and off-chip CODEC interface

The host exchanges data with the CMX638 via the C-BUS serial interface. When writing, CSN is low, first write the register address to be accessed, and then write valid data, in bytes, CSN is pulled high at the end; when reading, the address is written first, then the data is read. Sampled on the rising edge of CLK, the maximum clock frequency is 5 MHz; every two CSN operations should be at least 1μs apart.

When the CMX638 selects an external CODEC, it uses the SSP interface to exchange data with the external CODEC. When the STRB sync pulse arrives, if it is a write operation, SDI inputs 16 bit data; if it is a read operation, SDO outputs 16 bit data. The maximum clock frequency of SCLK is 6.6 MHz, and the way the clock edge samples the input data depends on the internal register EXCODECCONT ($0B).

4 application circuit

4.1 CMX638 acquisition circuit design

FIG. 4 is an application circuit of voice sampling, compression, and decompression based on CMX638, which acquires a voice signal of a microphone and directly compresses it; and then decompresses and restores the source voice signal to the speaker. The CMX638 uses an on-chip voice CODEC to capture analog signals directly. The input/output channels have two programmable gain amplifiers, respectively, which are determined by the configuration registers AIG ($05) and AOG ($06). When the input/output gain is large, noise may occur, but these noises are filtered by the on-chip digital low-pass filter. The input/output terminals of the signal do not need to be connected to the amplifier circuit and the filter circuit to improve the signal-to-noise ratio.

Voice sampling based on CMX638

The input/output of the microphone and speaker are differentially connected to improve the anti-jamming performance. The crystal oscillator frequency is 12 MHz, the corresponding XTALSEL[3:1] pin input value is "010", and the pin ENABXTAL input is high. Since the on-chip voice CODEC is selected and the pin CSEL is input high, the digital interfaces SDI, SDO, SCLK, and STRB that communicate with the off-chip voice CODEC must be all grounded. Pins EEC and FEC are output ports that can be left floating. The C-BUS interface is connected to the microcontroller. The CLK clock frequency is 1 MHz. The internal registers are configured through the C-BUS interface to determine the working mode. Under the normal working state of the code, the microcontroller synchronizes with the CMX638 according to the SYNC port, receives the interrupt signal through the IRQN, reads the compressed data frame and stores it as the subsequent processing; during the decoding process, the microcontroller sends the data frame to the CMX638. Decode and recover the source speech signal.

4.2 CMX638 and PCM3500 interface circuit design

The CMX638 is flexible in use. When an off-chip voice CODEC is selected, its typical application is to use with the PCM3500. Figure 5 shows the application circuit. The PCM3500 is a 16-bit low-power A/D and D/A converter developed by Burr-Brown. The system crystal oscillator has a clock frequency of 4.096 MHz and a sampling rate of 8 kHz. The port BCK clock frequency is 128 kHz. The MS input high level is the active working mode, the FS actively outputs the synchronous signal, and the BCK outputs the clock signal. The TSC input low level controls the time slot operation mode. This function is enabled when multiple PCM3500s are used at the same time. The corresponding FSO is the output port and can be left floating. The pin LOOP enables the A/D converter to be cyclically connected to the D/A converter. The HPFD input is high, canceling the high-pass filter and filtering out the DC component of the input. The microphone and speaker adopt single-ended input/output mode, the input terminal is connected with a gain circuit of 22 and a DC bias circuit, and the output end is connected with a low-pass filter to improve the signal-to-noise ratio. The digital interface is connected to the SPI interface of the CMX638 for data exchange.

Since the CMX638 selects the off-chip voice CODEC, the port CSEL should input a low level, and use the REC to connect to the PDWN port of the PCM3500 to reset it; the analog input/output terminal needs to add corresponding amplification and filtering circuits. The microcontroller configuration internal register EXCODECCONT ($0B) allows the CMX638 to correspond to the PCM3500's communication interface, as shown in Figure 5. The circuit also realizes the acquisition of the voice signal of the microphone, directly compresses; and then decompresses and restores the source signal output to the speaker. Both Figures 4 and 5 can be flexibly applied to fields such as voice recorders, voice communication systems, digital links, and the like.

Communication interface between CMX638 and PCM3500

5 Conclusion

With the rapid development of digital voice communication, it is required to maintain high quality speech signals at extremely low transmission rates. Improving the compression algorithm with a coding rate lower than 4 Kb/s has undoubtedly become a hot research topic. As the most promising waveform interpolation speech coding algorithm, its future research focuses on more reasonable complementation with other low-rate speech coding techniques; feature waveform extraction and alignment problems. The CMX638 uses a robust speech codec algorithm with advanced low-complexity waveform insertion technology to maintain long-distance voice quality at low rates, saving storage resources and reducing communication bandwidth requirements. The vocoder CMX638 integrates A/D and D/A converters to directly process analog signals. It is flexible and has broad application prospects.

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