How can I make a good PCB?

Everyone knows that creating a PCB board involves transforming a designed schematic into an actual circuit board. However, don't underestimate this process. Many things that work well in theoretical projects are challenging to execute in practical engineering. Producing a PCB board is not just about assembling components; it's a complex task requiring precision and expertise. Two significant challenges in the field of microelectronics are handling high-frequency signals and weak signals. The level of PCB production plays a crucial role here. Even with the same design principles and components, different individuals producing PCBs can yield varying results.

First, clearly define your design goals: When receiving a design task, the first step is to clarify what you're aiming for—whether it’s a standard PCB, a high-frequency PCB, or a small-signal processing PCB. For a regular PCB, ensuring proper layout and wiring, along with accurate mechanical dimensions, is essential. If the board includes medium load lines or long lines, specific techniques should be applied to minimize load and reinforce the long lines. Pay particular attention to signal lines carrying more than 40MHz frequencies, as long-line reflections can become problematic. Crosstalk between lines and stricter restrictions on wiring length at higher frequencies also need consideration.

According to network theory involving distributed parameters, the interaction between high-speed circuits and their connections is a critical factor in system design. As the speed of gates increases, the opposition on signal lines leads to more crosstalk between adjacent lines. Additionally, high-speed circuits consume more power and generate more heat. When dealing with high-speed PCBs, these aspects demand sufficient attention. Weak signals, measured in millivolts or even microvolts, require extra care. These signals are vulnerable to interference from stronger signals, reducing the signal-to-noise ratio and potentially overwhelming useful signals with noise. During the design phase, consider how the board will be tested, including isolating test points and considering factors like the number of boards and mechanical strength. Keep these design goals in mind throughout the process.

Second, understand the functions of the components used, along with their layout and wiring requirements: Some specialized components have unique placement and routing needs. For instance, analog signal amplifiers used in LOTI and APH systems require a smooth ripple. Small analog signal parts should be kept away from power devices. On OTI boards, small signal amplification might involve shielding to protect against stray electromagnetic interference from GTO ink chips. The ECL process generates significant heat, so heat dissipation must be carefully considered in the layout. Place the GTO ink chip in an area with good airflow to ensure dissipated heat doesn’t affect nearby chips. High-power devices like speakers should also be given attention to prevent serious contamination of the power supply.

Third, consider the layout of components: One of the primary factors to consider is electrical performance. Components with closely related wiring should be grouped together as much as possible, especially for high-speed line layouts, which should be as short as possible. Power signals and small-signal devices should be separated to meet circuit performance. Neat and tidy component placement facilitates the positioning of sockets and test boards. High-speed systems also require careful consideration of grounding delays and transmission delays on interconnection lines, which significantly impact overall system speed. For high-speed ECL circuits, delays of about 2 nanoseconds occur per 30 cm of common interconnection line length on the substrate. Such delays can drastically reduce system speed. Synchronous components like shift registers and counters should ideally be placed on the same board to avoid errors due to clock signal delays across different boards. If this isn’t possible, synchronization becomes critical, and the length of clock lines connecting from a common clock source to each board must be equal.

When designing high-speed lines, any long signal path on a printed circuit board can be treated as a transmission line. If the transmission delay time of the line is much shorter than the signal rise time, reflections from the main generator will be submerged during the signal rise, preventing overshot, recoil, and ringing. Most current MOS circuits have a much larger ratio of rise time to line transmission delay time, allowing traces to be longer without signal distortion, especially for faster logic circuits. However, for ultra-high-speed ECL integrated circuits, increasing edge speed requires significantly shorter traces to maintain signal integrity. There are two approaches to building high-speed circuits:

Working on relatively long lines without severe waveform distortion using TTL with fast falling edges and Schottky diode clamping methods to clamp the overshoot below the ground potential by one diode drop, reducing the recoil amplitude. Slower rising edges allow overshoot but are attenuated by the relatively high output impedance (50-80 ohms). Additionally, the backslash is not very high due to the high immunity of the H-level state. Devices in the HCT series combine Schottky diode clamping and series resistance termination methods for greater effectiveness.

The above TTL shaping method appears slightly inferior at higher bit rates and faster edge rates when signals fan out along the line, as reflected waves tend to synthesize at high bit rates, causing severe signal distortion and reduced anti-interference capability. Thus, another method is typically used in ECL systems: the line impedance matching method ensures strict control over signal reflection integrity. Conventional TTL and CMOS devices do not require transmission lines for slower edge speeds, whereas high-speed ECL devices benefit from transmission lines with faster edge speeds. Using transmission lines offers advantages like predicting connection delay and controlling reflection and oscillation through impedance matching:

1. The basic factors determining whether to use a transmission line include the system signal rate, connection distance, capacitive load (fanout), resistive load line termination, and allowed backslash and overshoot percentage. AC immunity reduction is another consideration.

2. Types of transmission lines include coaxial cables and twisted pairs, commonly used for system-to-system connections. The characteristic impedance of a coaxial cable is usually 50 or 75 ohms, while twisted pairs are typically 110 ohms. Microstrip lines on printed circuit boards are another option, where a strip conductor (signal line) is separated from the ground plane by a dielectric. Controlling the thickness, width of the line, and its distance from the ground plane allows control of the characteristic impedance. The characteristic impedance \(Z_0\) is calculated using the relative dielectric constant (\(E_r\)) of the printed board’s dielectric material.

3. The thickness \(W\) of the dielectric layer, the width of the line, and the thickness of the line influence the characteristic impedance. The length of the transmission delay time of the microstrip line depends solely on the dielectric constant and is independent of the line width or spacing.

Parallel terminal wiring offers the advantage of faster system speed and distortion-free long-line signal transmission without affecting the drive gate’s transmission delay time or signal edge speed. Series termination methods allow circuits to drive multiple parallel load lines, but they increase the transmission delay time along long lines. For large fanout drives, the load can be distributed along branch short lines instead of series termination. Series termination reduces crosstalk compared to parallel termination, as the signal transmitted along series-terminated wiring has only half the logic swing, resulting in lower switching currents and reduced signal energy crosstalk.

When selecting PCB board technology, choose between double-panel or multi-layer boards. The highest operating frequency and circuit system complexity determine whether to use a multi-layer board. For clock frequencies exceeding 200 MHz, a multi-layer board is preferable. If the frequency exceeds 350 MHz, a printed circuit board with Teflon as the dielectric layer is recommended due to its lower high-frequency attenuation, smaller parasitic capacitance, faster transmission speed, and larger \(Z_0\).

For printed circuit board traces, follow these principles: All parallel signal lines should be as close as possible, with large intervals to reduce crosstalk. If two signal lines are close together, placing a ground line between them can provide shielding. Avoid sharp turns when designing signal transmission lines to prevent reflection of the characteristic impedance of the transmission line, and aim for uniformly curved arcs. The width of the printed line can be calculated using the microstrip line and strip line characteristic impedance formulas. A characteristic impedance between 50 and 120 ohms is generally desired. Narrow but very thin lines are harder to produce, so an impedance of around 68 ohms is typically optimal, balancing delay time and power consumption.

Properly terminated transmission lines ensure that branch short lines have no effect on line delay time. When \(Z_0\) is 50 ohms, the length of the branching short line must be limited to 25 cm to avoid large ringing. On four-layer lines in double-panel or six-layer boards, the lines on both sides of the board should be perpendicular to each other to prevent mutual inductance induction.

If high-current devices like relays or indicator horns are mounted on the printed circuit board, they should be separated to reduce ground noise. The ground wires of these high-current devices should connect to the board and back to a separate ground bus on the board, with these separate ground lines also connected to the entire system's ground point.