High-power LED chip development

High-power chip technology focuses on improving the efficiency of light extraction to enhance the luminous efficiency of the chip. The main technical approaches and developments are described as follows:

A: Technology to change the shape of the chip When the emission point is in the center of the ball, the spherical chip can get the best light extraction efficiency. The idea of ​​changing the geometry of the chip to improve light extraction efficiency was used in diode chips as early as the 1960s, but it has not been practical due to cost reasons. In practical applications, special shape chips are often used to improve the efficiency of lateral light emission. Special geometric specifications can also be designed at the bottom of the light emitting area (front light) or epitaxial layer material (back light), and appropriate The area is coated with a high antireflection layer film to improve the lateral light utilization efficiency of the chip.

In 1999, HP developed the inverted pyramidal AlInGaP chip and achieved commercial goals. The TIP structure reduces the transmission distance of light in the crystal and reduces the loss of light due to internal reflection and absorption (active region absorption and free trap absorption, etc.). Significant improvement in chip characteristics, luminous efficiency of 100 lumens / watt (100mA, 610nm), external quantum efficiency of even more than 55% (650nm), while the face-down flip structure makes the PN junction closer to the heat sink, improved heat dissipation Features improve chip life.

Two: Bonding Technology AlGaInP and AlGaInN base diode epitaxial wafers used are GaAs and sapphire, respectively, and their thermal conductivity is poor. For more effective heat dissipation and lower junction temperature, the substrate can be thinned or the substrate originally used for growing the epitaxial layer can be removed, and then the epitaxial layer can be transferred to a substrate with good thermal conductivity and good thermal conductivity. Such as copper, aluminum, gold tin alloy, aluminum nitride and so on. Bonding can be accomplished with alloyed solders such as AuSn, PbSn, In, and the like. Si's thermal conductivity is better than that of GaAs and sapphire. It is easy to process and inexpensive. It is the material of choice for power chips.

In 2001, Cree launched a new generation of XBTM series back-powered power chips with dimensions of 0.9mmx0.9mm. The top wire bond pad is in the center and the "m" shaped electrode allows the injection current to spread more evenly. The AuSn alloy is used to flip-chip solder the chip on the chassis and has a low thermal resistance. When the operating current is 400mA, the output optical power at wavelengths of 405 and 470nm is 250mW and 150mW, respectively.

Three: Flip chip technology AlGaInN base diode epitaxial wafer is generally grown on the insulating sapphire substrate, ohmic contact P electrode and N electrode can only be prepared on the same side of the epitaxial surface, the front part of the light emitted will be contact with the electrode Absorb and bond lead shielding. The main factor that causes light absorption is the low conductivity of the P-type GaN layer. To meet the requirement of current spreading, the thickness of the translucent NiAu ohmic contact layer covering most of the surface of the epitaxial layer should be greater than 5-10 nm, but With minimal absorption, the thickness of the ohmic contact layer of the NiAu must be very thin, so that an appropriate trade-off is made between the light transmittance and the spread resistivity, and the result of the trade-off design must be such that the improvement of the power conversion is limited.

Flip chip technology can increase the output power, reduce the thermal resistance, make the light-emitting pn junction near the heat sink, and improve the reliability of the device. In 2001 Lumileds reported the application of flip-chip bonding technology on high-power AlInGaN-based chips, avoiding the effects of electrode pads and leads on light extraction efficiency, improving current spreading and heat dissipation, and preparing the back-reflection film. The light reflects back out of the sapphire side to further increase the light output efficiency, the external quantum efficiency reaches 21%, the power exchange efficiency reaches 20% (200mA, 435nm), the maximum power reaches 400mW (drive current 1A, 435nm, chip size 1mmx1mm), The overall luminous efficiency is 1.6 times greater than that of a formal dress.

Four: In addition to preparing a metal-based reflective layer at the bonding interface, a full-surface reflective film can also grow AlInGaP and AlInGaN-based chips with a DBR layer through epitaxial growth. However, since the DBR reflectance decreases rapidly with the increase of the incident angle, the total Azimuth average still has higher light loss, and the reflective film efficiency is not high.

Metal-based omni-directional reflective films can be applied to both flip-chip and flip-chip applications. The metal-based omni-directional reflective film can effectively improve the light extraction efficiency, but it must be solved how to prepare a low-resistance ohmic contact, a high all-round reflectivity, and the reflective film will not be damaged in the subsequent process and lose the characteristics of low resistance and high reflection, etc. .

V. Metal bond peeling technology Hewlett-Packard Co., Ltd. combined with bonding technology first used large substrate lift-off technology to peel the GaAs substrate from the epitaxial layer, and then bonded the epitaxial layer on a transparent GaP substrate to prepare an AlInGaP-based chip. Technology can improve luminous efficiency by nearly 2 times.

In 1996, the AIGaInN power chip with laser technology for stripping 2-inch HVPE GaN and sapphire and replacing the sapphire substrate with a Si (or metal) substrate was mainly completed in three key process steps: 1 Bonding metal deposition on the epitaxial surface Layers such as Pd100nm, as well as depositing a layer of 1000nm indium on the bonding substrate such as Si substrate; 2 bonding the epitaxial wafer to the substrate at low temperature; 3 KrF pulsed excimer laser illuminating the bottom of sapphire to make sapphire and GaN interface GaN undergoes thermal decomposition, and sapphire is removed from GaN by heating (40 degrees).

In February 2003, the German company OSRAM used laser technology to remove sapphire, raising the light extraction efficiency of the chip to 75%, which is 3 times that of conventional chips. By bonding the chip to a Cu chip and then laser-stripping the sapphire substrate, the heat dissipation capability can be increased by a factor of 4 and the luminous power can also be increased by a factor of four.

Six: Surface Roughness Surface roughening mainly changes the direction of light that satisfies the law of total reflection, and then it is not totally reflected by the other surface or reflected back to the original surface, but also can prevent reflection. The surface roughness reduces internal reflection by scattering light, but at the same time it does not damage the electro-optic characteristics of the material. The increase in transmission is considered to be the main function of the surface roughening, and the optimized surface roughness (430 nm spherical relief surface) can make the light extraction efficiency reach 54%.

A new generation of AlInGaP chips was developed in 2001 by the German company Osram, which uses the latest design to etch the surface of the chip's window layer into a texture that improves light extraction efficiency, as shown in Figure 2-10. The basic unit of the surface texture of the chip is a triangular structure with a bevel, and the reflection path of the photons is enclosed in such a structure, so that the photons emitted from the active layer can be taken out more efficiently. The geometry of the ohmic contact electrode is located in the injected current of the light emitting structure, so that the injected current can be more effectively extended to the active region. The Bragg reflection layer of the epitaxial wafer is designed to have a wide reflection angle so that most of the back reflection of the chip can be covered. The AlInGaP based chip with this textured surface structure can achieve an external quantum efficiency of more than 50%, and the power conversion efficiency after chip packaging exceeds 30 lumens/W, which is twice that of the conventional AlInGaP based chip (GaAs substrate), and the use of a chip The bonding technology AlInGaP based chip (GaP transparent substrate) has comparable performance but simple process and low cost. The texture surface structure has no influence on the beam angle characteristics, and can not only replace the conventional square chip, but also can easily scale up the large-size chip applied to the power type, and the wafer-bonded transparent substrate AlInGaP based chip (GaP transparent liner Bottom) Due to technical complexity, it can only be applied to 3-inch GaAs substrates. In terms of reducing production costs and realizing industrial scale production, AlInGaP based chips (GaP transparent substrates) with a textured surface high-efficiency light taking structure have broad prospects for development.

The AlInGN-based chip can also increase the light efficiency by roughening the p-GaN surface, but direct roughening can easily damage the active layer, and transparent electrodes are more difficult to prepare. At present, the roughening of the surface by changing the epitaxial growth conditions is a more feasible process. In 1999, Fuji reported that the AlInGaN based chip was bonded to a silicon substrate, and the substrate was removed by laser lift-off to form an ordered tapered shape by photoelectrochemical etching on the n-type GaN surface to increase the luminous intensity by 2.3 times. In addition to the rough surface, the side roughness of the chip can further improve the light output efficiency. The external quantum efficiency of the surface roughness is 22%, and the roughness can reach 31% after the side roughness. By using a regular texture (3mm x 3mm) on ITO/NiOx, the chip emission power can be increased from 6.1mW to 7.1mW. The microscopic roughness of the P-type GaN surface (metal nanobeam deposition aided by wet etching) can increase the light extraction efficiency by 62%. The use of surface roughening plus a back-reflective film structure results in an external quantum efficiency of up to 40%.

Seven: The microchip array microchip array can increase luminous efficiency, and its principle is not yet clear. Some people think that the release of stress leads to the weakening of the dielectric field, which improves the internal quantum efficiency of the chip, and some people think that the microchip array improves the external quantum efficiency. The increase in external quantum efficiency is due to the increase in the area around the chip in the microchip array. Generally, the diameter of the microchip is about 10 μm. The thickness of the chip is about 1 μm. The ratio of the surface area of ​​the chip to the surrounding area can be up to 1:1.4. Obviously, the area around the chip provides more. More light surface area. The microchip array can increase the light output efficiency, and the light extraction efficiency from the sapphire after flip-chip can further improve the light extraction efficiency of each microchip by preparing the microlenses on the sapphire. The ICP method is used to prepare the sapphire and the microchip is relatively integrated in one device. On the micro-concave lens, the micro lens can increase the light intensity by about 30% compared to the flat sapphire surface.

Eight: The photonic crystal shallow two-dimensional surface grating photonic crystal can avoid damage to the active region and introduce too much surface damage in the photonic crystal preparation process, causing a decrease in the internal quantum efficiency, and at the same time, can exert the diffraction of the photonic crystal and change the light. The incident angle improves the light output efficiency by 1.7-2.7 times. The fabrication process involves the electron beam lithography and etching process to produce a grid geometry with lattice constants.